Novel Architectures department
Editors: Volodymyr Kindratenko and Pedro Trancoso
CiSE’s Novel Architectures department mission is to keep the readers of the magazine up to date with the latest developments in computing architectures and their application to scientific computing. Our goal is to keep the readers of the magazine well informed about the latest trends and developments of new computing architectures and ways these architectures can be used in their research. Our approach in accomplishing this goal is to publishing short articles that i) introduce novel computing architectures in terms understandable to the broad magazine’s readership and ii) provide examples of advantages and challenges in practical use of such architectures.
CiSE’s Novel Architectures department publishes articles about novel computing architectures and provides examples of how to get started with exploring these architectures in practice. The department also publishes timely articles about novel ways of using existing architectures and articles that compare tools, development methodologies, and performance for different architectures. The department emphasizes articles about novel architectures that have broad applicability to the science and engineering fields over articles that describe architectures suitable for only a narrow range of applications. Articles suitable for the department, while may not be limited to, are those that cover the following topics, within the scope of scientific computing and applications:
- Novel and future processor and system architectures and technology
- Programming models and languages for emerging architectures
- Tools and application development methodologies for emerging architectures
- Evaluation of novel and future architectures
- Benchmark applications for novel and future architectures
- Emerging industrial products and related academic research activities that impact the novel and future architectures
CiSE’s Novel Architectures department readership consists of scientists, engineers, and educators from a broad set of disciplines who rely heavily on computation.
Article preparation and submission
CiSE’s Novel Architectures department published solicited articles only. Authors interested in writing an article for the department should first discuss their ideas with one of the department’s editors. Department articles are subjected solely to an internal review by the department editors. Authors must expect that after their manuscript has been accepted on the basis of its technical merit, the text will undergo a substantial amount of additional editing for style by the magazine’s editorial staff.
CiSE’s Novel Architectures department article should be written with the following in mind: provide sufficient technical details, be understandable to a wide range of readership, and illustrate how the presented technology or methodology can be applied to a broad range of science and engineering disciplines.
CiSE’s Novel Architectures department article should be written in the active voice and should be around 3,000 words long, including figures and tables, which count as 250 words each. Magazine’s editorial staff uses Microsoft Word to prepare manuscripts for publication, and all graphics files are eventually rendered as eps files. Thus, it is highly desirable that the submissions come in this format, or at least can be converted to Microsoft Word. Regardless of the submission format, manuscripts should also be accompanied with a pdf file that can be used to match formatting. CiSE’s Novel Architectures department articles are published regularly, in each issue. Table below provides submission/publication schedule.
|Draft due for department’s editors||25 September||25 November||25 January||25 March||25 May||25 July|
|Materials due for edit||10 October||2 December||10 February||10 April||10 June||10 August|
Published and Upcoming articles
- Volodymyr Kindratenko, "Novel Computing Architectures," vol. 11, no. 3, pp. 54-57, May/June 2009, doi:10.1109/MCSE.2009.56
- Jonathan Cohen, Michael Garland, "Solving Computational Problems with GPU Computing," vol. 11, no. 5, pp. 58-63, Sep./Oct. 2009, doi:10.1109/MCSE.2009.144
- Amr Bayoumi, Michael Chu, Yasser Hanafy, Patricia Harrell, and Gamal Refai-Ahmed, "Scientific and Engineering Computing Using ATI Stream Technology," vol. 11, no. 6, pp. 92-97, Nov./Dec. 2009, doi:10.1109/MCSE.2009.204
- Guochun Shi, Volodymyr Kindratenko, Frederico Pratas, Pedro Trancoso, Michael Gschwind, "Application Acceleration with the Cell Broadband Engine," vol. 12, no. 1, pp. 76-81, Jan./Feb. 2010, doi:10.1109/MCSE.2010.4
- Craig Steffen, Gildas Genest, "Nallatech In-Socket FPGA Front-Side Bus Accelerator," vol. 12, no. 2, pp. 78-82, March/April 2010, doi:10.1109/MCSE.2010.45
- John Stone, David Gohara, Guochun Shi, "OpenCL: A Parallel Programming Standard for Heterogeneous Computing Systems," vol. 12, no. 3, pp. 66-72, May/June 2010, doi:10.1109/MCSE.2010.69
- Todd Scofield, Jeffrey Delmerico, Vipin Chaudhary, Geno Valente, "XtremeData dbX: An FPGA-Based Data Warehouse Appliance," vol. 12, no. 4, pp. 66-73, July/August 2010, doi:10.1109/MCSE.2010.93
- Xin Jin, Mikel Lujan, Luis A. Plana, Sergio Davies, Steve Temple and Steve B. Furber, "Modelling of Spiking Neural Networks on SpiNNaker," vol. 12, no. 5, pp. 91-97, Sep./Oct. 2010, doi:10.1109/MCSE.2010.112
- Jason Bakos, "High-Performance Heterogeneous Computing with the Convey HC-1," vol. 12, no. 6, pp. 80-87, Nov./Dec. 2010, doi:10.1109/MCSE.2010.135
- Alan George, Herman Lam, and Greg Stitt, "Novo-G: At the Forefront of Scalable Reconfigurable Supercomputing," vol. 13, no. 1, pp. 82-86, Jan./Feb. 2011, doi:10.1109/MCSE.2011.11
- Mike Showerman, Jeremy Enos, Craig Steffen, Sean Treichler, William Gropp, Wen-mei W. Hwu, "EcoG: A Power-Efficient GPU Cluster Architecture for Scientific Computing," vol. 13, no. 2, pp. 83-87, Mar./Apr. 2011, doi:10.1109/MCSE.2011.30
- Volodymyr Kindratenko, Pedro Trancoso, "Trends in High-Performance Computing," vol. 13, no. 3, pp. 92-95, May/June 2011, doi:10.1109/MCSE.2011.52
- Jeffrey S. Vetter, Richard Glassbrook, Jack Dongarra, Karsten Schwan, Bruce Loftis, Stephen McNally, Jeremy Meredith, James Rogers, Philip Roth, Kyle Spafford, and Sudhakar Yalamanchili, "Keeneland: Bringing Heterogeneous GPU Computing to the Computational Science Community," vol. 13, no. 5, pp. 90-95, September/Octpber 2011, doi:10.1109/MCSE.2011.83
- Matthias Gries, Ulrich Hoffmann, Michael Konow, and Michael Riepen, "SCC: A Flexible Architecture for Many-Core Platform Research," vol. 13, no. 6, pp. 79-83, November/December 2011, doi:10.1109/MCSE.2011.109
- Alexander Heinecke, Michael Klemm, and Hans-Joachim Bungartz, "From GPGPU to Many-Core: Nvidia Fermi and Intel Many Integrated Core Architecture," vol. 14, no. 2, pp. 78-83, March/April 2012, doi:10.1109/MCSE.2012.23
- Oliver Pell and Vitali Averbukh, "Maximum Performance Computing with Dataflow Engines," vol. 14, no. 4, pp. 98-103, July/August 2012, doi:10.1109/MCSE.2012.78
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